Texas Instruments TMS320DM355 Manual do Utilizador descarregar pdf (Página 66)

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PRODUCT PREVIEW

ARMsubsystem

MPEG/JPEG

Coprocessor

SYSCLK1

SYSCLK2

VPFE

VPBE

DAC

DDRPHY

DDR

PLLDIV1(/1)

BPDIV(/8)

PLL controller2

PLL controller1

PLLDIV3(/n)

PLLDIV2(/4)

PLLDIV1(/2)

SYSCLK3

I2C

Timers(x4)

PWMs(x4)

SPI(x3)

MMC/SD(x2)

EMIF/NAND

ASP (x2)

GPIO

UART2

ARMINTC

USB

60MHz

Reference

clock

(MXI/MXO)

(24MHzor

36MHz)

Referenceclock

(MXI/MXO)

24MHzor36Mhz

PCLK

AUXCLK(/1)

BPDIV(/3)

SYSCLK1

CLKOUT3

SYSCLKBP

CLKOUT2

EDMA

Buslogic

Syslogic

PSC

IcePick

EXTCLK

RTO

USBPhy

SYSCLKBP

AUXCLK

PLLDIV4(/4or/2)

VPSS

UART0,1

CLKOUT1

Sequencer

SYSCLK4

TMS320DM355

Digital Media System-on-Chip (DMSoC)

SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007

Figure 3-2. Device Clocking Block Diagram

66 Detailed Device Description Submit Documentation Feedback

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