Texas-instruments TMS320C6452 DSP Manual do Utilizador Página 30
- Página / 46
- Índice
- MARCADORES
Avaliado. / 5. Com base em avaliações de clientes
www.ti.com
CK
CK
CKE
CS
WE
RAS
CAS
LDM
UDM
LDQS
UDQS
BA[2:0]
A[12:0]
DQ[15:0]
VREF
DDR2
memory
x16−bit
LDQS
UDQS
DDR_CLK
DDR_CLK
DDR_CKE
DDR_CS
DDR_WE
DDR_RAS
DDR_DQM0
DDR_CAS
DDR_DQM1
DDR_DQS0
DDR_DQS0
DDR_DQS1
DDR_DQS1
DDR_BA[2:0]
DDR_A[13:0]
DDR_D[15:0]
DDR_DQM2
DDR_DQM3
DDR_DQS2
DDR_DQS3
DDR_D[31:16]
DDR_DQGATE0
(A)
DDR2
memory
controller
ODT
DDR_DQS2
DDR_DQS3
memory
x16−bit
LDQS
A[12:0]
VREF
ODT
DQ[15:0]
UDQS
BA[2:0]
UDQS
LDQS
LDM
UDM
RAS
CAS
WE
CS
CKE
CK
CK
DDR2
VREF
DDR_ODT0
DDR_ODT1
DDR_DQGATE1
(A)
DDR_DQGATE2
(A)
DDR_DQGATE3
(A)
Using the DDR2 Memory Controller
Figure 17. Connecting to Two 16-Bit DDR2 SDRAM Devices
A These pins are used as a timing reference during memory reads. For routing rules, see the device-specific data
manual.
30 DSP DDR2 Memory Controller SPRUF85 – October 2007
Submit Documentation Feedback
- User's Guide 1
- 2 SPRUF85 – October 2007 2
- Submit Documentation Feedback 2
- Contents 3
- Read This First 6
- DSP DDR2 Memory Controller 9
- Introduction 10
- 2 Peripheral Architecture 11
- 2.1 Clock Control 11
- 2.2 Memory Map 11
- 2.3 Signal Descriptions 11
- Peripheral Architecture 12
- 2.4 Protocol Description(s) 13
- D0 D1 D2 D3 D4 D5 D6 D7 17
- 2.6 Address Mapping 19
- 2.8 Refresh Scheduling 25
- 2.9 Self-Refresh Mode 26
- 2.10 Reset Considerations 26
- 2.12 Interrupt Support 28
- 2.13 EDMA Event Support 28
- 2.14 Emulation Considerations 28
- IMPORTANT NOTICE 46
Manuais e produtos relacionados com Hardware Texas-instruments TMS320C6452 DSP
(306 páginas)Apricorn Discos de estado sólido manuales de usuario
La lista de productos de Apricorn Discos de estado sólido contiene 2 manuales de usuario para 2 seleccionados. Todas las guías de usuario en pdf están disponibles para descargar o ver en línea.
Comentários a estes Manuais