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DSP_blk_eswap32
4-80
Endian-Swap a Block of 32-Bit Values
DSP_blk_eswap32
Function void blk_eswap32(void * restrict x, void * restrict r, int nx)
Arguments x [nx] Source data. Must be double-word aligned.
r [nx] Destination array. Must be double-word aligned.
nx Number of 32-bit values to swap. Must be multiple of 4.
Description The data in the x[] array is endian swapped, meaning that the byte-order of the
bytes within each word of the r[] array is reversed. This facilitates moving
big-endian data to a little-endian system or vice-versa.
When the r pointer is non-NULL, the endian-swap occurs out-of-place, similar
to a block move. When the r pointer is NULL, the endian-swap occurs in-place,
allowing the swap to occur without using any additional storage.
Algorithm This is the C equivalent of the assembly code without restrictions. Note that the
assembly code is hand optimized and restrictions may apply.
void DSP_blk_eswap32(void *x, void *r, int nx)
{
int i;
char *_x, *_r;
if (r)
{
_x = (char *)x;
_r = (char *)r;
} else
{
_x = (char *)x;
_r = (char *)r;
}
for (i = 0; i < nx; i++)
{
char t0, t1, t2, t3;
t0 = _x[i*4 + 3];
t1 = _x[i*4 + 2];
- TMS320C64x+ DSP 1
- Little-Endian DSP Library 1
- Programmer’s Reference 1
- Read This First 3
- Trademarks 4
- Contents 5
- Introduction 9
- 1.2 Features and Benefits 12
- Installing and Using DSPLIB 13
- 2.1 How to Install DSPLIB 14
- 2.2 Using DSPLIB 15
- (log2(nx)−cei[log4(nx)−1]) 16
- (log2(nx)) 16
- 2.3 How to Rebuild DSPLIB 17
- DSPLIB Function Tables 19
- 3.2 DSPLIB Functions 21
- 3.3 DSPLIB Function Tables 22
- Table 3−4. FFT (Continued) 23
- Table 3−6. Math 24
- Table 3−7. Matrix 24
- Table 3−8. Miscellaneous 25
- Table 3−9. Obsolete Functions 25
- DSPLIB Reference 29
- 4.1 Adaptive Filtering 30
- DSP_firlms2 31
- 4.2 Correlation 32
- DSP_autocor 33
- DSP_autocor_rA8 34
- AutoCorrelation 34
- DSP_fft16x16 36
- DSP_fft16x16_imre 39
- DSP_fft16x16r 42
- DSP_fft16x32 52
- DSP_fft32x32 54
- DSP_fft32x32s 56
- DSP_ifft16x16 58
- DSP_ifft16x16_imre 60
- DSP_ifft16x32 62
- DSP_ifft32x32 64
- 4.4 Filtering and Convolution 66
- DSP_fir_cplx 67
- DSP_fir_cplx_hM4X4 68
- Complex FIR Filter 68
- DSP_fir_gen 70
- FIR Filter 70
- DSP_fir_gen_hM17_rA8X8 72
- DSP_fir_r4 74
- DSP_fir_r8 76
- DSP_fir_r8_hM16_rM8A8X8 78
- DSP_fir_sym 80
- Symmetric FIR Filter 80
- IIR With 5 Coefficients 82
- DSP_iirlat 84
- All-Pole IIR Lattice Filter 84
- 4.5 Math 86
- DSP_dotp_sqr 87
- DSP_dotprod 88
- Vector Dot Product 88
- DSP_maxval 90
- Maximum Value of Vector 90
- DSP_maxidx 91
- DSP_minval 93
- Minimum Value of Vector 93
- DSP_mul32 94
- 32-Bit Vector Multiply 94
- DSP_neg32 96
- 32-Bit Vector Negate 96
- DSP_recip16 97
- 16-Bit Reciprocal 97
- DSP_vecsumsq 99
- Sum of Squares 99
- DSP_w_vec 100
- Weighted Vector Sum 100
- 4.6 Matrix 101
- DSP_mat_mul 102
- DSP_mat_trans 103
- Matrix Transpose 103
- 4.7 Miscellaneous 104
- DSP_bexp 105
- DSP_blk_eswap16 106
- DSP_blk_eswap32 108
- DSP_blk_eswap64 110
- DSP_blk_move 112
- Block Move (Overlapping) 112
- DSP_fltoq15 113
- Float to Q15 Conversion 113
- DSP_minerror 115
- Minimum Energy Error Search 115
- DSP_q15tofl 117
- Q15 to Float Conversion 117
- 4.8 Obsolete Functions 118
- DSP_bitrev_cplx 119
- DSP_radix2 121
- Complex Forward FFT (radix 2) 121
- DSP_r4fft 123
- Complex Forward FFT (radix 4) 123
- DSP_fft16x16t 135
- Appendix A 149
- Performance Considerations 150
- A.2 Fractional Q Formats 151
- A.2.3 Q.31 Format 152
- Appendix B 153
- B.1 DSPLIB Software Updates 154
- B.2 DSPLIB Customer Support 154
- Glossary 155
- C-3Glossary 157
- C-5Glossary 159
- C-7Glossary 161
- C-9Glossary 163
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