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5.27 Receive Channel 0-7 Flow Control Threshold Register (RX nFLOWTHRESH)

EMAC Port Registers

The receive channel 0-7 flow control threshold register (RX nFLOWTHRESH) is shown in Figure 55 and

described in Table 55 .

Figure 55. Receive Channel n Flow Control Threshold Register (RX nFLOWTHRESH)

31 16

Reserved

R-0

15 8 7 0

Reserved RX nFLOWTHRESH

R-0 R/W-0

LEGEND: R/W = Read/Write; R = Read only; - n = value after reset

Table 55. Receive Channel n Flow Control Threshold Register (RX nFLOWTHRESH) Field

Descriptions

Bit Field Value Description

31-8 Reserved 0 Reserved

7-0 RX nFLOW Receive flow threshold. These bits contain the threshold value for issuing flow control on incoming

THRESH frames for channel n (when enabled).

SPRU975B – August 2006 Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) 111

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